In magnetooptical disk [devices], a laser beam is irradiated on the magnetooptical disk, and the reflected light is used to reproduce the data. However, the reproduced differential signal contains variations in the reflectivity of the disk and variations in the low-frequency component caused by out-of-focus conditions, etc. These variations result in DC offset. Consequently, an offset elimination circuit is set to remove the offset.
In the magnetooptical disk device, the format of the data track is shown in FIG. 3. It can be seen that Variable Frequency Oscillation (VFO) region 2, the region that contains only sinusoidal wave (clock signal), is arranged ahead of data region 1.
Said VFO region 2 has a continuous repeated data pattern (sinusoidal wave) for reliable reproduction of the data, even in the case of variation in rotation of the disk. It is the data pattern that generates the clock for reading the data as the PLL (phase-locked loop) circuit is locked to this pattern because there is also a variation in the pattern of VFO when there is variation in rotation of the disk.
During reproduction, when the VFO region has DC offset, the duty ratio, that is, the ratio of "1" to "0" in each period of the pulse, cannot become 50% for the detection pulses, and it is impossible to obtain good reproduction data.
The offset elimination circuit of the magnetooptical recording device has a constitution in which the offset of the differential data is absorbed in the so-called VFO region.
FIG. 4 is a circuit diagram illustrating an example of the constitution of the offset elimination circuit that removes the DC offset of the reproduction differential signal.
As shown in FIG. 4, this offset elimination circuit 10 comprises comparator (COMP) 11, charge pump circuit (C/P) 12, sample-and-hold circuit (S/H) 13, capacitors 14, 15 and adder 16.
In said offset elimination circuit 10, light is irradiated on a magnetic disk [sic; magnetooptical disk], and reproduction is performed from the reflected light; as shown in FIG. 5(a), signal S13 is added by adder 16 to obtained reproduction differential signal DDT in the VFO region, and DDT is then input as a sinusoidal wave to comparator 11.
By means of comparator 11, as shown in FIG. 5(b), the input differential DDT generates square-wave data signal S11, which is output to charge pump circuit 12.
By means of charge pump circuit 12, sawtooth data signal S12 is generated and output to sample-and-hold circuit 13. For the sawtooth data signal, the waveform rises during the period from the rising edge to the falling edge of square-wave data signal S11 and it falls during the period from the falling edge to the rising edge of square-wave data signal S11.
By means of sample-and-hold circuit 13 and capacitor 15, in synchronization with gate signal GT set in the active state only in the processing period of the VFO region, the sample operation and hold operation are performed repeatedly with respect to output signal S12 of charge pump circuit 12, and the obtained signal is output as signal S13. Said signal S13 is added to reproduction differential signal DDT by adder 16, and said differential signal DDT is input to comparator 11.
In this way, a feedback circuit is formed, and, in charge pump circuit 12, feedback control is performed such that the duty ratio becomes 50%, that is, the offset becomes 0.
In said offset elimination circuit 10, the data is held (maintained) corresponding to gate signal GT by sample-and-hold circuit 13. However, as the gate timing is asynchronous to the data, a maximum ripple error takes place.
In order to solve this problem, it has been proposed that the current be reduced in order to decrease the ripple. However, in this case, the convergence time becomes longer, which is contradictory to the requirement for faster speed.
The purpose of the present invention is to solve the aforementioned problems of the conventional technology by providing a type of offset elimination circuit which can reliably remove the ripple error with a simple circuit.